<?xml version="1.0" encoding="utf-8"?>
<!DOCTYPE eagle SYSTEM "eagle.dtd">
<eagle version="6.5.0">
<drawing>
<library>
<packages>
<package name="MICROZED_REV_F">
<description>&lt;p&gt;This library is distributed in the hope that it will be useful, but is provided AS IS with ABSOLUTELY NO WARRANTY;&lt;br&gt;
The entire risk as to the quality of the library is with you. Should the library prove defective, you assume the cost of all necessary servicing, repair, correction and etc.&lt;br&gt;
In no event will any of the developers, or any other party, be liable to anyone for damages arising out of the use or inability to use the library. &lt;p&gt;


MicroZed Rev F - based on next mechanical drawing: &lt;a href='http://www.zedboard.org/sites/default/files/documentations/MicroZed_RevF_Mechanical_131029_PRELIMINARY.PDF'&gt;http://www.zedboard.org/sites/default/files/documentations/MicroZed_RevF_Mechanical_131029_PRELIMINARY.PDF&lt;/a&gt;</description>
</package>
<package name="0821-1X1T-43-F_ETHERNET+USB">
<description>BelFuse - gigabit MagJack Combo (Eth+USB). Ref: &lt;a href='http://belfuse.com/pdfs/0821-1G1T-43.pdf'&gt;http://belfuse.com/pdfs/0821-1G1T-43.pdf&lt;/a&gt;</description>
</package>
<package name="61083-101***">
<description>61083-101***  -  Bergstak®  : 0.8mm Pitch, 100 Positions, Dual Row, BTB Vertical Receptacle 
&lt;br&gt;
&lt;br&gt;

Mates with all 100 Positions Bergstak® Plugs Base P/N 61082
&lt;br&gt;
&lt;br&gt;
&lt;br&gt;
&lt;a href='http://portal.fciconnect.com/Comergent//fci/drawing/61083.pdf'&gt;http://portal.fciconnect.com/Comergent//fci/drawing/61083.pdf&lt;/a&gt;</description>
</package>
<package name="61082-101***">
<description>61082-101***  -  Bergstak®  : 0.8mm Pitch, 100 Positions, Dual Row, BTB Vertical Receptacle 
&lt;br&gt;
&lt;br&gt;

Mates with all 100 Positions Bergstak® Plugs Base P/N 61083
&lt;br&gt;
&lt;br&gt;
&lt;br&gt;
&lt;a href='http://portal.fciconnect.com/Comergent//fci/drawing/61082.pdf'&gt;http://portal.fciconnect.com/Comergent//fci/drawing/61082.pdf&lt;/a&gt;</description>
</package>
</packages>
<symbols>
<symbol name="MICROZED_F_JX1">
<description>JX1 header of microZed 7010/7020 Rev F</description>
<pin name="JTAG_TCK"/>
<pin name="JTAG_TMS"/>
<pin name="JTAG_TDO"/>
<pin name="PWR_ENABLE" direction="in"/>
<pin name="FPGA_VBATT" direction="pas"/>
<pin name="JX1_SE_0" direction="pas"/>
<pin name="JX1_LVDS_0_P"/>
<pin name="JX1_LVDS_0_N"/>
<pin name="GND@15" direction="pwr"/>
<pin name="JX1_LVDS_2_P"/>
<pin name="JX1_LVDS_2_N"/>
<pin name="GND@21" direction="pwr"/>
<pin name="JX1_LVDS_4_P"/>
<pin name="JX1_LVDS_4_N"/>
<pin name="GND@27" direction="pwr"/>
<pin name="JX1_LVDS_6_P"/>
<pin name="JX1_LVDS_6_N"/>
<pin name="GND@33" direction="pwr"/>
<pin name="JX1_LVDS_8_P"/>
<pin name="JX1_LVDS_8_N"/>
<pin name="GND@39" direction="pwr"/>
<pin name="JX1_LVDS_10_P"/>
<pin name="JX1_LVDS_10_N"/>
<pin name="GND@45" direction="pwr"/>
<pin name="JX1_LVDS_12_P"/>
<pin name="JX1_LVDS_12_N"/>
<pin name="GND@51" direction="pwr"/>
<pin name="JX1_LVDS_14_P"/>
<pin name="JX1_LVDS_14_N"/>
<pin name="VIN_HDR@57" direction="pwr"/>
<pin name="VIN_HDR@59" direction="pwr"/>
<pin name="JX1_LVDS_16_P"/>
<pin name="JX1_LVDS_16_N"/>
<pin name="GND@65" direction="pwr"/>
<pin name="JX1_LVDS_18_P"/>
<pin name="JX1_LVDS_18_N"/>
<pin name="GND@71" direction="pwr"/>
<pin name="JX1_LVDS_20_P"/>
<pin name="JX1_LVDS_20_N"/>
<pin name="GND@77" direction="pwr"/>
<pin name="VCCO_34@79" direction="pwr"/>
<pin name="JX1_LVDS_22_P"/>
<pin name="JX1_LVDS_22_N"/>
<pin name="GND@85" direction="pwr"/>
<pin name="BANK13_LVDS_0_P"/>
<pin name="BANK13_LVDS_0_N"/>
<pin name="BANK13_LVDS_2_P"/>
<pin name="BANK13_LVDS_2_N"/>
<pin name="GND@95" direction="pwr"/>
<pin name="VP_0_P"/>
<pin name="VN_0_N"/>
<pin name="JTAG_TDI"/>
<pin name="!RESET#" direction="in"/>
<pin name="FPGA_DONE" direction="out"/>
<pin name="JX1_SE_1" direction="pas"/>
<pin name="JX1_LVDS_1_P"/>
<pin name="JX1_LVDS_1_N"/>
<pin name="GND@16" direction="pwr"/>
<pin name="JX1_LVDS_3_P"/>
<pin name="JX1_LVDS_3_N"/>
<pin name="GND@22" direction="pwr"/>
<pin name="JX1_LVDS_5_P"/>
<pin name="JX1_LVDS_5_N"/>
<pin name="GND@28" direction="pwr"/>
<pin name="JX1_LVDS_7_P"/>
<pin name="JX1_LVDS_7_N"/>
<pin name="GND@34" direction="pwr"/>
<pin name="JX1_LVDS_9_P"/>
<pin name="JX1_LVDS_9_N"/>
<pin name="GND@40" direction="pwr"/>
<pin name="JX1_LVDS_11_P"/>
<pin name="JX1_LVDS_11_N"/>
<pin name="GND@46" direction="pwr"/>
<pin name="JX1_LVDS_13_P"/>
<pin name="JX1_LVDS_13_N"/>
<pin name="GND@52" direction="pwr"/>
<pin name="JX1_LVDS_15_P"/>
<pin name="JX1_LVDS_15_N"/>
<pin name="VIN_HDR@58" direction="pwr"/>
<pin name="VIN_HDR@60" direction="pwr"/>
<pin name="JX1_LVDS_17_P"/>
<pin name="JX1_LVDS_17_N"/>
<pin name="GND@66" direction="pwr"/>
<pin name="JX1_LVDS_19_P"/>
<pin name="JX1_LVDS_19_N"/>
<pin name="GND@72" direction="pwr"/>
<pin name="JX1_LVDS_21_P"/>
<pin name="JX1_LVDS_21_N"/>
<pin name="VCCO_34@78" direction="pwr"/>
<pin name="VCCO_34@80" direction="pwr"/>
<pin name="JX1_LVDS_23_P"/>
<pin name="JX1_LVDS_23_N"/>
<pin name="GND@86" direction="pwr"/>
<pin name="BANK13_LVDS_1_P"/>
<pin name="BANK13_LVDS_1_N"/>
<pin name="BANK13_LVDS_3_P"/>
<pin name="BANK13_LVDS_3_N"/>
<pin name="GND@96" direction="pwr"/>
<pin name="DXP_0_P"/>
<pin name="DXP_0_N"/>
</symbol>
<symbol name="MICROZED_F_JX2">
<description>JX2 header of microZed 7010/7020 Rev F</description>
<pin name="PMOD_D0"/>
<pin name="PMOD_D1"/>
<pin name="PMOD_D2"/>
<pin name="PMOD_D4"/>
<pin name="PMOD_D6"/>
<pin name="!INIT#" direction="in"/>
<pin name="!PG_MODULE" direction="pas"/>
<pin name="JX2_SE_0" direction="pas"/>
<pin name="GND@15" direction="pwr"/>
<pin name="JX2_LVDS_0_P"/>
<pin name="JX2_LVDS_0_N"/>
<pin name="GND@21" direction="pwr"/>
<pin name="JX2_LVDS_2_P"/>
<pin name="JX2_LVDS_2_N"/>
<pin name="GND@27" direction="pwr"/>
<pin name="JX2_LVDS_4_P"/>
<pin name="JX2_LVDS_4_N"/>
<pin name="GND@33" direction="pwr"/>
<pin name="JX2_LVDS_6_P"/>
<pin name="JX2_LVDS_6_N"/>
<pin name="GND@39" direction="pwr"/>
<pin name="JX2_LVDS_8_P"/>
<pin name="JX2_LVDS_8_N"/>
<pin name="GND@45" direction="pwr"/>
<pin name="JX2_LVDS_10_P"/>
<pin name="JX2_LVDS_10_N"/>
<pin name="GND@51" direction="pwr"/>
<pin name="JX2_LVDS_12_P"/>
<pin name="JX2_LVDS_12_N"/>
<pin name="VIN_HDR@57" direction="pwr"/>
<pin name="VIN_HDR@59" direction="pwr"/>
<pin name="JX2_LVDS_14_P"/>
<pin name="JX2_LVDS_14_N"/>
<pin name="GND@65" direction="pwr"/>
<pin name="JX2_LVDS_16_P"/>
<pin name="JX2_LVDS_16_N"/>
<pin name="GND@71" direction="pwr"/>
<pin name="JX2_LVDS_18_P"/>
<pin name="JX2_LVDS_18_N"/>
<pin name="GND@77" direction="pwr"/>
<pin name="VCCO_35@79" direction="pwr"/>
<pin name="JX2_LVDS_20_P"/>
<pin name="JX2_LVDS_20_N"/>
<pin name="GND@85" direction="pwr"/>
<pin name="JX2_LVDS_22_P"/>
<pin name="JX2_LVDS_22_N"/>
<pin name="GND@91" direction="pwr"/>
<pin name="BANK13_LVDS_4_P"/>
<pin name="BANK13_LVDS_4_N"/>
<pin name="BANK13_LVDS_6_P"/>
<pin name="BANK13_LVDS_6_N"/>
<pin name="PMOD_D3"/>
<pin name="PMOD_D5"/>
<pin name="PMOD_D7"/>
<pin name="PG_1V8" direction="pwr"/>
<pin name="VIN_HDR@12" direction="pwr"/>
<pin name="JX2_SE_1" direction="pas"/>
<pin name="GND@16" direction="pwr"/>
<pin name="JX2_LVDS_1_P"/>
<pin name="JX2_LVDS_1_N"/>
<pin name="GND@22" direction="pwr"/>
<pin name="JX2_LVDS_3_P"/>
<pin name="JX2_LVDS_3_N"/>
<pin name="GND@28" direction="pwr"/>
<pin name="JX2_LVDS_5_P"/>
<pin name="JX2_LVDS_5_N"/>
<pin name="GND@34" direction="pwr"/>
<pin name="JX2_LVDS_7_P"/>
<pin name="JX2_LVDS_7_N"/>
<pin name="GND@40" direction="pwr"/>
<pin name="JX2_LVDS_9_P"/>
<pin name="JX2_LVDS_9_N"/>
<pin name="GND@46" direction="pwr"/>
<pin name="JX2_LVDS_11_P"/>
<pin name="JX2_LVDS_11_N"/>
<pin name="GND@52" direction="pwr"/>
<pin name="JX2_LVDS_13_P"/>
<pin name="JX2_LVDS_13_N"/>
<pin name="VIN_HDR@58" direction="pwr"/>
<pin name="VIN_HDR@60" direction="pwr"/>
<pin name="JX2_LVDS_15_P"/>
<pin name="JX2_LVDS_15_N"/>
<pin name="GND@66" direction="pwr"/>
<pin name="JX2_LVDS_17_P"/>
<pin name="JX2_LVDS_17_N"/>
<pin name="GND@72" direction="pwr"/>
<pin name="JX2_LVDS_19_P"/>
<pin name="JX2_LVDS_19_N"/>
<pin name="VCCO_35@78" direction="pwr"/>
<pin name="VCCO_35@80" direction="pwr"/>
<pin name="JX2_LVDS_21_P"/>
<pin name="JX2_LVDS_21_N"/>
<pin name="GND@86" direction="pwr"/>
<pin name="JX2_LVDS_23_P"/>
<pin name="JX2_LVDS_23_N"/>
<pin name="GND@92" direction="pwr"/>
<pin name="BANK13_LVDS_5_P"/>
<pin name="BANK13_LVDS_5_N"/>
<pin name="VCCO_13@98" direction="pwr"/>
<pin name="BANK13_SE_0"/>
</symbol>
</symbols>
<devicesets>
<deviceset name="MICROZED_REV_F" prefix="MICROZED">
<description>&lt;p&gt;This library is distributed in the hope that it will be useful, but is provided AS IS with ABSOLUTELY NO WARRANTY;&lt;br&gt;
The entire risk as to the quality of the library is with you. Should the library prove defective, you assume the cost of all necessary servicing, repair, correction and etc.&lt;br&gt;
In no event will any of the developers, or any other party, be liable to anyone for damages arising out of the use or inability to use the library. &lt;p&gt;

MicroZed Rev F - based on schematics at: &lt;a href='http://zedboard.com/sites/default/files/documentations/MicroZed_RevF_Schematic_140128.pdf'&gt;http://zedboard.com/sites/default/files/documentations/MicroZed_RevF_Schematic_140128.pdf&lt;/a&gt;</description>
<gates>
<gate name="-JX1" symbol="MICROZED_F_JX1"/>
<gate name="-JX2" symbol="MICROZED_F_JX2"/>
</gates>
<devices>
<device name="" package="MICROZED_REV_F">
<connects>
<connect gate="-JX1" pin="!RESET#" pad="JX1_6"/>
<connect gate="-JX1" pin="BANK13_LVDS_0_N" pad="JX1_89"/>
<connect gate="-JX1" pin="BANK13_LVDS_0_P" pad="JX1_87"/>
<connect gate="-JX1" pin="BANK13_LVDS_1_N" pad="JX1_90"/>
<connect gate="-JX1" pin="BANK13_LVDS_1_P" pad="JX1_88"/>
<connect gate="-JX1" pin="BANK13_LVDS_2_N" pad="JX1_93"/>
<connect gate="-JX1" pin="BANK13_LVDS_2_P" pad="JX1_91"/>
<connect gate="-JX1" pin="BANK13_LVDS_3_N" pad="JX1_94"/>
<connect gate="-JX1" pin="BANK13_LVDS_3_P" pad="JX1_92"/>
<connect gate="-JX1" pin="DXP_0_N" pad="JX1_100"/>
<connect gate="-JX1" pin="DXP_0_P" pad="JX1_98"/>
<connect gate="-JX1" pin="FPGA_DONE" pad="JX1_8"/>
<connect gate="-JX1" pin="FPGA_VBATT" pad="JX1_7"/>
<connect gate="-JX1" pin="GND@15" pad="JX1_15"/>
<connect gate="-JX1" pin="GND@16" pad="JX1_16"/>
<connect gate="-JX1" pin="GND@21" pad="JX1_21"/>
<connect gate="-JX1" pin="GND@22" pad="JX1_22"/>
<connect gate="-JX1" pin="GND@27" pad="JX1_27"/>
<connect gate="-JX1" pin="GND@28" pad="JX1_28"/>
<connect gate="-JX1" pin="GND@33" pad="JX1_33"/>
<connect gate="-JX1" pin="GND@34" pad="JX1_34"/>
<connect gate="-JX1" pin="GND@39" pad="JX1_39"/>
<connect gate="-JX1" pin="GND@40" pad="JX1_40"/>
<connect gate="-JX1" pin="GND@45" pad="JX1_45"/>
<connect gate="-JX1" pin="GND@46" pad="JX1_46"/>
<connect gate="-JX1" pin="GND@51" pad="JX1_51"/>
<connect gate="-JX1" pin="GND@52" pad="JX1_52"/>
<connect gate="-JX1" pin="GND@65" pad="JX1_65"/>
<connect gate="-JX1" pin="GND@66" pad="JX1_66"/>
<connect gate="-JX1" pin="GND@71" pad="JX1_71"/>
<connect gate="-JX1" pin="GND@72" pad="JX1_72"/>
<connect gate="-JX1" pin="GND@77" pad="JX1_77"/>
<connect gate="-JX1" pin="GND@85" pad="JX1_85"/>
<connect gate="-JX1" pin="GND@86" pad="JX1_86"/>
<connect gate="-JX1" pin="GND@95" pad="JX1_95"/>
<connect gate="-JX1" pin="GND@96" pad="JX1_96"/>
<connect gate="-JX1" pin="JTAG_TCK" pad="JX1_1"/>
<connect gate="-JX1" pin="JTAG_TDI" pad="JX1_4"/>
<connect gate="-JX1" pin="JTAG_TDO" pad="JX1_3"/>
<connect gate="-JX1" pin="JTAG_TMS" pad="JX1_2"/>
<connect gate="-JX1" pin="JX1_LVDS_0_N" pad="JX1_13"/>
<connect gate="-JX1" pin="JX1_LVDS_0_P" pad="JX1_11"/>
<connect gate="-JX1" pin="JX1_LVDS_10_N" pad="JX1_43"/>
<connect gate="-JX1" pin="JX1_LVDS_10_P" pad="JX1_41"/>
<connect gate="-JX1" pin="JX1_LVDS_11_N" pad="JX1_44"/>
<connect gate="-JX1" pin="JX1_LVDS_11_P" pad="JX1_42"/>
<connect gate="-JX1" pin="JX1_LVDS_12_N" pad="JX1_49"/>
<connect gate="-JX1" pin="JX1_LVDS_12_P" pad="JX1_47"/>
<connect gate="-JX1" pin="JX1_LVDS_13_N" pad="JX1_50"/>
<connect gate="-JX1" pin="JX1_LVDS_13_P" pad="JX1_48"/>
<connect gate="-JX1" pin="JX1_LVDS_14_N" pad="JX1_55"/>
<connect gate="-JX1" pin="JX1_LVDS_14_P" pad="JX1_53"/>
<connect gate="-JX1" pin="JX1_LVDS_15_N" pad="JX1_56"/>
<connect gate="-JX1" pin="JX1_LVDS_15_P" pad="JX1_54"/>
<connect gate="-JX1" pin="JX1_LVDS_16_N" pad="JX1_63"/>
<connect gate="-JX1" pin="JX1_LVDS_16_P" pad="JX1_61"/>
<connect gate="-JX1" pin="JX1_LVDS_17_N" pad="JX1_64"/>
<connect gate="-JX1" pin="JX1_LVDS_17_P" pad="JX1_62"/>
<connect gate="-JX1" pin="JX1_LVDS_18_N" pad="JX1_69"/>
<connect gate="-JX1" pin="JX1_LVDS_18_P" pad="JX1_67"/>
<connect gate="-JX1" pin="JX1_LVDS_19_N" pad="JX1_70"/>
<connect gate="-JX1" pin="JX1_LVDS_19_P" pad="JX1_68"/>
<connect gate="-JX1" pin="JX1_LVDS_1_N" pad="JX1_14"/>
<connect gate="-JX1" pin="JX1_LVDS_1_P" pad="JX1_12"/>
<connect gate="-JX1" pin="JX1_LVDS_20_N" pad="JX1_75"/>
<connect gate="-JX1" pin="JX1_LVDS_20_P" pad="JX1_73"/>
<connect gate="-JX1" pin="JX1_LVDS_21_N" pad="JX1_76"/>
<connect gate="-JX1" pin="JX1_LVDS_21_P" pad="JX1_74"/>
<connect gate="-JX1" pin="JX1_LVDS_22_N" pad="JX1_83"/>
<connect gate="-JX1" pin="JX1_LVDS_22_P" pad="JX1_81"/>
<connect gate="-JX1" pin="JX1_LVDS_23_N" pad="JX1_84"/>
<connect gate="-JX1" pin="JX1_LVDS_23_P" pad="JX1_82"/>
<connect gate="-JX1" pin="JX1_LVDS_2_N" pad="JX1_19"/>
<connect gate="-JX1" pin="JX1_LVDS_2_P" pad="JX1_17"/>
<connect gate="-JX1" pin="JX1_LVDS_3_N" pad="JX1_20"/>
<connect gate="-JX1" pin="JX1_LVDS_3_P" pad="JX1_18"/>
<connect gate="-JX1" pin="JX1_LVDS_4_N" pad="JX1_25"/>
<connect gate="-JX1" pin="JX1_LVDS_4_P" pad="JX1_23"/>
<connect gate="-JX1" pin="JX1_LVDS_5_N" pad="JX1_26"/>
<connect gate="-JX1" pin="JX1_LVDS_5_P" pad="JX1_24"/>
<connect gate="-JX1" pin="JX1_LVDS_6_N" pad="JX1_31"/>
<connect gate="-JX1" pin="JX1_LVDS_6_P" pad="JX1_29"/>
<connect gate="-JX1" pin="JX1_LVDS_7_N" pad="JX1_32"/>
<connect gate="-JX1" pin="JX1_LVDS_7_P" pad="JX1_30"/>
<connect gate="-JX1" pin="JX1_LVDS_8_N" pad="JX1_37"/>
<connect gate="-JX1" pin="JX1_LVDS_8_P" pad="JX1_35"/>
<connect gate="-JX1" pin="JX1_LVDS_9_N" pad="JX1_38"/>
<connect gate="-JX1" pin="JX1_LVDS_9_P" pad="JX1_36"/>
<connect gate="-JX1" pin="JX1_SE_0" pad="JX1_9"/>
<connect gate="-JX1" pin="JX1_SE_1" pad="JX1_10"/>
<connect gate="-JX1" pin="PWR_ENABLE" pad="JX1_5"/>
<connect gate="-JX1" pin="VCCO_34@78" pad="JX1_78"/>
<connect gate="-JX1" pin="VCCO_34@79" pad="JX1_79"/>
<connect gate="-JX1" pin="VCCO_34@80" pad="JX1_80"/>
<connect gate="-JX1" pin="VIN_HDR@57" pad="JX1_57"/>
<connect gate="-JX1" pin="VIN_HDR@58" pad="JX1_58"/>
<connect gate="-JX1" pin="VIN_HDR@59" pad="JX1_59"/>
<connect gate="-JX1" pin="VIN_HDR@60" pad="JX1_60"/>
<connect gate="-JX1" pin="VN_0_N" pad="JX1_99"/>
<connect gate="-JX1" pin="VP_0_P" pad="JX1_97"/>
<connect gate="-JX2" pin="!INIT#" pad="JX2_9"/>
<connect gate="-JX2" pin="!PG_MODULE" pad="JX2_11"/>
<connect gate="-JX2" pin="BANK13_LVDS_4_N" pad="JX2_95"/>
<connect gate="-JX2" pin="BANK13_LVDS_4_P" pad="JX2_93"/>
<connect gate="-JX2" pin="BANK13_LVDS_5_N" pad="JX2_96"/>
<connect gate="-JX2" pin="BANK13_LVDS_5_P" pad="JX2_94"/>
<connect gate="-JX2" pin="BANK13_LVDS_6_N" pad="JX2_99"/>
<connect gate="-JX2" pin="BANK13_LVDS_6_P" pad="JX2_97"/>
<connect gate="-JX2" pin="BANK13_SE_0" pad="JX2_100"/>
<connect gate="-JX2" pin="GND@15" pad="JX2_15"/>
<connect gate="-JX2" pin="GND@16" pad="JX2_16"/>
<connect gate="-JX2" pin="GND@21" pad="JX2_21"/>
<connect gate="-JX2" pin="GND@22" pad="JX2_22"/>
<connect gate="-JX2" pin="GND@27" pad="JX2_27"/>
<connect gate="-JX2" pin="GND@28" pad="JX2_28"/>
<connect gate="-JX2" pin="GND@33" pad="JX2_33"/>
<connect gate="-JX2" pin="GND@34" pad="JX2_34"/>
<connect gate="-JX2" pin="GND@39" pad="JX2_39"/>
<connect gate="-JX2" pin="GND@40" pad="JX2_40"/>
<connect gate="-JX2" pin="GND@45" pad="JX2_45"/>
<connect gate="-JX2" pin="GND@46" pad="JX2_46"/>
<connect gate="-JX2" pin="GND@51" pad="JX2_51"/>
<connect gate="-JX2" pin="GND@52" pad="JX2_52"/>
<connect gate="-JX2" pin="GND@65" pad="JX2_65"/>
<connect gate="-JX2" pin="GND@66" pad="JX2_66"/>
<connect gate="-JX2" pin="GND@71" pad="JX2_71"/>
<connect gate="-JX2" pin="GND@72" pad="JX2_72"/>
<connect gate="-JX2" pin="GND@77" pad="JX2_77"/>
<connect gate="-JX2" pin="GND@85" pad="JX2_85"/>
<connect gate="-JX2" pin="GND@86" pad="JX2_86"/>
<connect gate="-JX2" pin="GND@91" pad="JX2_91"/>
<connect gate="-JX2" pin="GND@92" pad="JX2_92"/>
<connect gate="-JX2" pin="JX2_LVDS_0_N" pad="JX2_19"/>
<connect gate="-JX2" pin="JX2_LVDS_0_P" pad="JX2_17"/>
<connect gate="-JX2" pin="JX2_LVDS_10_N" pad="JX2_49"/>
<connect gate="-JX2" pin="JX2_LVDS_10_P" pad="JX2_47"/>
<connect gate="-JX2" pin="JX2_LVDS_11_N" pad="JX2_50"/>
<connect gate="-JX2" pin="JX2_LVDS_11_P" pad="JX2_48"/>
<connect gate="-JX2" pin="JX2_LVDS_12_N" pad="JX2_55"/>
<connect gate="-JX2" pin="JX2_LVDS_12_P" pad="JX2_53"/>
<connect gate="-JX2" pin="JX2_LVDS_13_N" pad="JX2_56"/>
<connect gate="-JX2" pin="JX2_LVDS_13_P" pad="JX2_54"/>
<connect gate="-JX2" pin="JX2_LVDS_14_N" pad="JX2_63"/>
<connect gate="-JX2" pin="JX2_LVDS_14_P" pad="JX2_61"/>
<connect gate="-JX2" pin="JX2_LVDS_15_N" pad="JX2_64"/>
<connect gate="-JX2" pin="JX2_LVDS_15_P" pad="JX2_62"/>
<connect gate="-JX2" pin="JX2_LVDS_16_N" pad="JX2_69"/>
<connect gate="-JX2" pin="JX2_LVDS_16_P" pad="JX2_67"/>
<connect gate="-JX2" pin="JX2_LVDS_17_N" pad="JX2_70"/>
<connect gate="-JX2" pin="JX2_LVDS_17_P" pad="JX2_68"/>
<connect gate="-JX2" pin="JX2_LVDS_18_N" pad="JX2_75"/>
<connect gate="-JX2" pin="JX2_LVDS_18_P" pad="JX2_73"/>
<connect gate="-JX2" pin="JX2_LVDS_19_N" pad="JX2_76"/>
<connect gate="-JX2" pin="JX2_LVDS_19_P" pad="JX2_74"/>
<connect gate="-JX2" pin="JX2_LVDS_1_N" pad="JX2_20"/>
<connect gate="-JX2" pin="JX2_LVDS_1_P" pad="JX2_18"/>
<connect gate="-JX2" pin="JX2_LVDS_20_N" pad="JX2_83"/>
<connect gate="-JX2" pin="JX2_LVDS_20_P" pad="JX2_81"/>
<connect gate="-JX2" pin="JX2_LVDS_21_N" pad="JX2_84"/>
<connect gate="-JX2" pin="JX2_LVDS_21_P" pad="JX2_82"/>
<connect gate="-JX2" pin="JX2_LVDS_22_N" pad="JX2_89"/>
<connect gate="-JX2" pin="JX2_LVDS_22_P" pad="JX2_87"/>
<connect gate="-JX2" pin="JX2_LVDS_23_N" pad="JX2_90"/>
<connect gate="-JX2" pin="JX2_LVDS_23_P" pad="JX2_88"/>
<connect gate="-JX2" pin="JX2_LVDS_2_N" pad="JX2_25"/>
<connect gate="-JX2" pin="JX2_LVDS_2_P" pad="JX2_23"/>
<connect gate="-JX2" pin="JX2_LVDS_3_N" pad="JX2_26"/>
<connect gate="-JX2" pin="JX2_LVDS_3_P" pad="JX2_24"/>
<connect gate="-JX2" pin="JX2_LVDS_4_N" pad="JX2_31"/>
<connect gate="-JX2" pin="JX2_LVDS_4_P" pad="JX2_29"/>
<connect gate="-JX2" pin="JX2_LVDS_5_N" pad="JX2_32"/>
<connect gate="-JX2" pin="JX2_LVDS_5_P" pad="JX2_30"/>
<connect gate="-JX2" pin="JX2_LVDS_6_N" pad="JX2_37"/>
<connect gate="-JX2" pin="JX2_LVDS_6_P" pad="JX2_35"/>
<connect gate="-JX2" pin="JX2_LVDS_7_N" pad="JX2_38"/>
<connect gate="-JX2" pin="JX2_LVDS_7_P" pad="JX2_36"/>
<connect gate="-JX2" pin="JX2_LVDS_8_N" pad="JX2_43"/>
<connect gate="-JX2" pin="JX2_LVDS_8_P" pad="JX2_41"/>
<connect gate="-JX2" pin="JX2_LVDS_9_N" pad="JX2_44"/>
<connect gate="-JX2" pin="JX2_LVDS_9_P" pad="JX2_42"/>
<connect gate="-JX2" pin="JX2_SE_0" pad="JX2_13"/>
<connect gate="-JX2" pin="JX2_SE_1" pad="JX2_14"/>
<connect gate="-JX2" pin="PG_1V8" pad="JX2_10"/>
<connect gate="-JX2" pin="PMOD_D0" pad="JX2_1"/>
<connect gate="-JX2" pin="PMOD_D1" pad="JX2_2"/>
<connect gate="-JX2" pin="PMOD_D2" pad="JX2_3"/>
<connect gate="-JX2" pin="PMOD_D3" pad="JX2_4"/>
<connect gate="-JX2" pin="PMOD_D4" pad="JX2_5"/>
<connect gate="-JX2" pin="PMOD_D5" pad="JX2_6"/>
<connect gate="-JX2" pin="PMOD_D6" pad="JX2_7"/>
<connect gate="-JX2" pin="PMOD_D7" pad="JX2_8"/>
<connect gate="-JX2" pin="VCCO_13@98" pad="JX2_98"/>
<connect gate="-JX2" pin="VCCO_35@78" pad="JX2_78"/>
<connect gate="-JX2" pin="VCCO_35@79" pad="JX2_79"/>
<connect gate="-JX2" pin="VCCO_35@80" pad="JX2_80"/>
<connect gate="-JX2" pin="VIN_HDR@12" pad="JX2_12"/>
<connect gate="-JX2" pin="VIN_HDR@57" pad="JX2_57"/>
<connect gate="-JX2" pin="VIN_HDR@58" pad="JX2_58"/>
<connect gate="-JX2" pin="VIN_HDR@59" pad="JX2_59"/>
<connect gate="-JX2" pin="VIN_HDR@60" pad="JX2_60"/>
</connects>
<technologies>
<technology name=""/>
</technologies>
</device>
</devices>
</deviceset>
</devicesets>
</library>
</drawing>
</eagle>
